Content-type: text/html
make - Maintains up-to-date versions of target files and performs shell commands
make [-bemNqrtUuxy] [-c|-C] [-F|-i|-k|-S] [-n|-p|-s] [-f makefile] [macro_definition...] target...
The
make
command updates one or more target names
by executing commands in a description file.
Has no effect; exists so that older-version
make
dependency files continue to work. This option is on by default.
Does not try to find a corresponding Revision Control System
(RCS) file and check it out if the file does not exist.
Tries to find a corresponding RCS file and check it out if
the file does not exist. This option is on by default.
Does not reassign environment variable values within the makefile.
Reads
makefile
for a description of how to build the target file.
If you give only a
-
(dash) for
makefile,
make
reads standard input. If you do not
use the
-f
option,
make
looks in the current
directory for a description file named
makefile,
Makefile,
makefile,v,
Makefile,v,
RCS/makefile,v, or
RCS/Makefile,v. You can specify more than one description file by entering the
-f
option more than once (with its associated
makefile
argument).
Causes a fatal error to occur if the description file is not
present.
Ignores error codes returned by commands and continues to
execute until finished. This is analogous to the pseudotarget command
.IGNORE:, which would be specified in the description file. The
make
command normally stops if a command returns a nonzero code.
Note that
make
does not link the resulting modules when
you use this option.
Stops processing the current target if an error occurs, but
continues with other branches that do not depend on the target that failed.
Searches for machine-specific subdirectories automatically.
This is used in conjunction with the
MACHINE
macro. This
subdirectory is searched first, then the current directory, and then the directories
from
VPATH, if defined.
Echoes commands, but does not execute them. Commands prefaced
by
@
(at sign) are also echoed.
Disables all
Makeconf
processing.
Echoes all of the environment variables, macro definitions,
and target descriptions before executing any commands.
Does not execute the commands in the makefile. Returns a
status code of zero if the object files are up-to-date; otherwise, returns
a nonzero value.
Causes the default rules to be ignored. This is analogous
to the pseudotarget command
.SUFFIXES:, which would be
specified in the description file. Using this option produces the additional
warning message:
No suffix list.
Does not echo the commands being executed. This is analogous
to the pseudotarget command
.SILENT:, which would be specified
in the description file.
Stops processing the current target if an error occurs and
does not continue to any other branch. This is the default.
Updates the last-modified date of the target file to the current
date.
Unlinks files that were previously checked out by RCS. This
option is set as the default. If the
.PRECIOUS:
pseudotarget
is defined in the dependency file, the target files are not removed.
Does not unlink files that were previously checked out by
RCS. This is the opposite of the
-U
option, which is the default.
Does not execute any commands. Performs RCS checkout on target
files if the
-C
option is also specified, which is the default.
The files will not be unlinked if the
-u
option is also specified.
This option is useful for creating working copies of source files. When used
with another option, the
-x
option performs only the action
specified by that option without performing any actions specified in the current
makefile.
Checks target files for dependencies. Use this option to
ensure that the target files are the latest revision of the source.
This make command is one of several versions available. See the SEE ALSO section for references to information about other versions of the command. By default, the make(1) command described in this reference page is invoked if you type the command name with no path.
The make command updates the target based on whether the target's dependencies have been modified relative to the time of last modification to the target, or if the target itself does not exist.
When the
-f
option is present, a description file,
makefile, must be specified or, if a
-
(dash)
follows this option, standard input is used as the description file. If the
-f
option is not present,
make
looks for the file
makefile
in the current directory to be used as the description
file. If no target is specified,
make
makes the first
target found in the description file.
The description file, whether it is the makefile or some other file, can contain a sequence of entries that define dependencies. These entries are referred to as dependency lines. A dependency line is defined as follows:
target1 [target2...]:[:] [dependency1...] [; command...]
The dependency line, starting at the leftmost margin, begins with the target. Specify a single target or multiple targets on the dependency line, separated by single spaces. A target can appear on multiple dependency lines. The target is separated from its dependencies by a : (colon). Use a single : when the target is listed on a single dependency line; use a double : when the target appears on multiple dependency lines. The dependencies are listed sequentially separated by a single space.
The use of dependencies is not mandatory, but if they are not used, the command line is always executed when the target is made. It is also possible to place a command line after the dependency list, as long as it is prefaced by a ; (semicolon). Delimit each command with a ; (semicolon).
The dependency line can be followed by a command line. The command line begins at the first tab indentation and can contain any shell command. There is no specific limit to the number of command lines that follow the dependency line. By default, the command line is echoed to standard output. You can alter this default behavior by specifying one of the following character sequences before the command line: Ignores any error returned by the command line. Does not display the command line. Does not display the command line and ignores error returned by command line.
To indicate to
make
that the current line continues
to the next line, place a
\
(backslash) as the last character
in the line. Comment lines begin with
#
(number sign)
and all text following this symbol up to the end of the line is considered
part of the comment.
The
make
facility uses
/bin/sh
to execute commands.
Macros can be defined in several ways. Some macros are defined by default by make internally. All environment variables are assumed to be macro definitions. Macros can be defined in the makefiles, on the make command line, in a description file, or in a separate file and then included into the makefile. By default, the internal macros are overridden by environment variables, macros defined in the makefile override environment variables, and macros defined on the command line override macros defined in the makefile. The -e option changes this such that environment variables override macros defined in the makefile.
Macro definitions on the command line use the same syntax as required within the description file except that command-line definitions cannot contain white space on either side of the equal sign. If the macro is a string, enclose it in quotes, either single or double as necessary to control file name expansion and variable substitution.
A macro definition begins at the leftmost margin of the description file but does not have to begin in column one. Spaces and tabs to the right of the assignment operator are not ignored. They are recognized as separators in a multiple listing. Comments are permitted on the definition line. Two forms of macro definitions can be used in the description file.
The syntax for a simple macro definition is specified as follows: MACRO = string
Conditional macro definitions are also available, their syntax is as follows: target:= MACRO = string
In the simple macro definition, the assignment to the macro name always occurs. In the conditional macro definition, the assignment occurs only if target is the current target name.
Macro definitions are referenced in the description as follows:
$(MACRO)
or
${MACRO}
If the macro name is a single byte, the ( ) (parentheses) or { } (braces) can be omitted, but the $ (dollar sign) must remain.
Macro nesting is also permissible to a maximum of two levels. The syntax for macro definitions is as follows: $($(MACRO))
or $($MACRO)
There is a facility to substitute portions of a predefined macro definition during macro evaluation. The syntax of this is as follows: $(MACRO:string1=string2)
When MACRO is evaluated, every occurrence of string1 defined in MACRO is substituted with string2. A macro is considered to be made up of a string of characters separated by spaces or tabs. The variable string1 is delimited by either spaces or tabs.
A more generalized form of macro substitution has the following syntax: $(MACRO/left/right)
In this syntax, macro is considered to be made up of a series of words, or substrings, separated by spaces or tabs. The left parameter can only have the following values: The right parameter is inserted at the beginning of each word. The right parameter is inserted at the end of each word. Each word is replaced with the right parameter, and then the original word is substituted for each occurrence of & (ampersand) in the right parameter.
For instance, if the macro is: MACRO = a b c, then macro substitution $(MACRO/*/x&y) would yield xay xby xcy. macro substitution $(MACRO/^/x) would yield xa xb xc. macro substitution $(MACRO/$/y) would yield ay by cy. macro substitution $(MACRO/*/x&y&z) would yield xayaz xbybz xcycz.
Another form of macro substitution has the following syntax: $(MACRO?string1:string2)
In this macro substitution, if MACRO is defined, string1 is assigned to MACRO; otherwise, the value of string2 is assigned to MACRO.
The following is a list of macros defined when make is invoked. These definitions can be overridden by reassigning a new value to the macro of interest:
AR=ar MAKE=make AS=as MAKEFILE=makefile CC=cc MV=mv CO=co PC=pc COFLAG=-q RANLIB=ranlib CP=cp RC=f77 EC=efl RM=rm FC=f77 RMFLAGS=-f LD=ld YACC=yacc LEX=lex YACCE=yacc -e LINT=lint YACCR=yacc -r MACHINE=alpha
The internal macros, set as each successive dependency is processed,
are defined as follows:
Represents the filename segment of the component. Used only
in conjunction with suffix rules.
Represents the name of the component that is being used to
make the target. Used only in conjunction with suffix rules.
Evaluates to the list of components that are out of last-modified-date
alignment with the current target.
Refers to the current target name in a shorthand notation.
Refers to the current target name in a shorthand notation
and can be used only on the dependency line.
The following are predefined macros used by the default inference rules
to the specified compiler:
For
cc
flags. Default is null.
For
f77
flags. Default is null.
For
pc
flags. The default is null.
For
lex
flags. Default is null.
For
yacc
flags. Default is null.
For
ld
flags. Default is null.
Contains the initial command line options to this invocation
of
make, including the
-
(dash) that
prefaces the flag character. Default is null.
Contains the initial command line options, not including the
-
(dash) that prefaces the flag character. The macro is exported
and therefore available to other invocations of
make.
As recursive calls to
make
are executed, the flags are
collected and passed to the next invocation. The
-f,
-p, and
-r
options are not assigned in this macro.
All command line macro definitions are assigned to this macro and cannot be
changed. Default is null.
Set with a list of directory pathnames separated by a
:
(colon). This is used when searching for a dependency-related
file. If this macro is defined, then those directories are searched. If this
macro is not defined or is just defined with a
.\
(dot
backslash), only the current directory is searched. Default is null.
VPATH
can be used to search for implicit prerequisites, internal
include files, description files, and description file command line words.
You can place pseudotarget names anywhere in the description file. You can also redefine them at any point in the description file. Is executed if no dependency line or suffix definition exists for a target. Causes make to continue executing commands even if an error was returned by the command. This is analogous to the -i option and to the - (dash) placed at the beginning of the command line. Specifies the names of target files that are not to be destroyed. Note the use of the -U option with this pseudotarget name. The default behavior of make is to delete the target on return of an error or an interrupt. Prevents echoing of the command line to standard output. This is analogous to the -s option and to the @ (at sign) placed at the beginning of the command line. Defines the standard suffixes utilized by the system tools to identify specific types of files.
Special targets are used to accomplish narrow tasks. The special target .INOBJECTDIR is used to specify that only certain targets be built in OBJECTDIR. The syntax for this target is as follows: .INOBJECTDIR: dependency1....
To repetitively have a target executed before or after some previous
target without having to repeat its name many times, use the special targets
.INIT
or
.EXIT.
The make facility infers prerequisites for files on the dependency line for which no explicit dependency is stated. In other words, if a .o file is the target, then make infers that a .c file is the dependency.
For example:
program: foo.o bar.o
cc -o program foo.o bar.o
foo.o:foo.c
cc -c foo.c
bar.o:bar.c
cc -c bar.c
can be reduced to the following:
program: foo.o bar.o
cc -o program
foo.o bar.o:
The configuration file Makeconf is used to alter the default rules. This file can contain the definitions of several macros. When make is invoked, it searches for this configuration file. This file can contain rules that override the default rules make uses. The make facility searches for this file, starting in the current directory and continuing through the build tree to its root.
Due to the increased use of shared file systems, it is desirable to have a facility to direct make to the location of object directories. If macro OBJECTDIR is defined in the Makeconf file, its value is used as the object root. It is formed by appending the value assigned to OBJECTDIR in the Makeconf file to the pathname where the Makeconf file was found. The make command does a chdir() to the OBJECTDIR. VPATH is modified so that make can find the target source files.
If the macro SOURCEDIR is defined, it is interpreted as the source root for make. It operates under the same rules as OBJECTDIR and updates VPATH accordingly.
Other configuration file macros available are as follows:
The relative path from the starting directory to the
Makeconf
directory.
The path from the
Makeconf
directory to the starting directory.
The current directory for
make.
The path from the current directory for
make
to the starting directory.
Recursive invocations of makefiles are possible from a command line. Use of the macro MAKE has a special effect on the other invocations of make. The line is executed even if the -n option was specified. The -n option is passed to the other invocations of make through the MAKEFLAGS macro. Use the macro MAKE when using a hierarchy of makefiles.
The following environment variables are exported to invocations of
make:
MAKEFLAGS,
MAKECONF,
MAKECWD, and
MAKEPSD.
If a file is specified on the dependency line and is not present in the current directory, make searches for it. The search path starts in the current directory, then the VPATH macro components are searched, then both the ./RCS and current directory with the extension ,v are searched. If an RCS file is found, it is checked out using the -q option, used for whatever purpose is required, and then deleted. The -c option suppresses the checkout, while the -u suppresses the deletion of the file.
By default, the update time of an RCS file is taken from its last modification. However, by specifying a rule for the special target .RCSTIME, the real modification time of a particular revision can be determined. $< sets to the name of the ,v file before invoking the command, which is expected to print the time (in decimal time_t format) on standard output. The appropriate .RCSTIME definition would be as follows:
.RCSTIME:
@rcstime $(COFLAGS) $<
Some commands return a nonzero status when, in fact, they
should have returned a zero status. Use the
-i
option to overcome
this.
Commands that are directly executed by the shell (specifically
cd), are ineffective across newlines in
make.
To make the file specified by the first entry in the description file, enter: make To display, but not run, the commands that make would use to make a file, enter: make -n search.o
make
commands file.
make
commands file.
Configuration file.
Commands: sh(1), touch(1), make(1u), make(1p)
Programming Support Tools